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1 ds04-28500-5e fujitsu semiconductor data sheet assp ad/da converter MB40166/mb40176 1-channel 6-bit ad/da converter with clamp circuit the fujitsu MB40166 and mb40176 are low power 6-bit ad/da converter which is fabricated with fujitsu advanced bipolar technology. MB40166 and mb40176 have the same basic circuits and functions, with the only difference being that MB40166 has an independent analog input terminal for the a/d section and a clamp voltage output terminal, while mb40176 has an analog input in the a/d section internally connected with the clamp circuit. since both models contain a single-chip clamp circuit and a reference voltage circuit, they are ideal for video signal processing. ? resolution :6 bits ? linearity error : 0.8% max. ? maximum conversion rate :20 msps min. ? analog input voltage range :v ref to v cca (MB40166) 0 to 1.0 v (mb40176) ? analog output voltage range :v cc to v cc -1 v ? digital i/o level :ttl level ? power supply voltage :+5 v ? power dissipation:300 mw typ. ? package 28pin plastic flat package (suffix : -pf) 28pin plastic dip package (suffix : -p) note: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings (see note) rating symbol value unit power supply voltage v cca , v ccd -0.5 to +7.0 v digital input voltage v ind -0.5 to +7.0 v analog input voltage v ina -0.5 to v cca +0.5 v storage temperature t stg -55 to +125 c this device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. plastic package dip-28p-m03 plastic package fpt-28p-m01
2 MB40166/mb40176 n pin assignment dack d d1 d d2 d d3 d d4 d d5 d d6 d a6 d a5 d a4 d a3 d a2 d a1 adck (msb) d.gnd v ccd a.gnd v cca v out comp v ref v ina v clmp (n.c.) v cca a.gnd v ccd d.gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 MB40166 (fpt-28p-m01) (dip-28p-m03) dack d d1 d d2 d d3 d d4 d d5 d d6 d a6 d a5 d a4 d a3 d a2 d a1 adck d.gnd v ccd a.gnd v cca v out comp v ref c 2 c 1 v in v cca a.gnd v ccd d.gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 mb40176 (fpt-28p-m01) (dip-28p-m03) (top view) (top view) note : the functions of the terminals within the dotted lines above are different for MB40166 and mb40176. (msb) (lsb) (lsb) (msb) (lsb) (lsb) (msb)
3 MB40166/mb40176 n block diagram MB40166 note : the circuits within the dotted lines above are different for MB40166 and mb40176. comp a.gnd d.gnd v ccd v cca clamp 0.8v cca 0.8v cca d a1 d a2 d a3 d a4 d a5 d a6 r 1 r r r r 2 v cca adck v ref master v out slave register buffer current switch dack d d1 (msb) to d d6 (lsb) 6 6 6 63 62 2 1 latch & buffer 63 to 6 encoder 13 20 v clmp 21 reference voltage generator 0.8v cca v ina 14 22 1 2 7 15 r-2r resistor network 6 6 28 17 26 18 25 16 27 23 12 11 10 9 8 24 (lsb) (msb)
4 MB40166/mb40176 n block diagram (continued) mb40176 note : the circuits within the dotted lines above are different for MB40166 and mb40176. clamp 0.8v cca 0.8v cca d a1 d a2 d a3 d a4 d a5 d a6 r 1 r r r r 2 v cca adck v ref master v out slave register buffer current switch dack d d1 (msb) to d d6 (lsb) 6 6 6 comp a.gnd d.gnd v ccd v cca 63 62 2 1 latch & buffer 63 to 6 encoder 13 19 v in c 1 c 2 reference voltage generator 0.8v cca 14 22 1 2 7 15 r-2r resistor network 6 6 28 17 26 18 25 16 27 23 12 11 10 9 8 24 (lsb) (msb) 20 21
5 MB40166/mb40176 n pin descriptions section pin no. symbol i/o function 40166 40176 a/d 21 C v ina i analog signal input. C19 v in i 22 v ref o reference voltage output. reference voltage divided by the resistors, with the output voltage set to 0.8 x v cca (v). 8 to 13 d a1 to d a6 o digital signal outputs. (d a1 : msb, d a6 : lsb) 20 C v clmp o clamp voltage output. C20 c 1 C clamp capacitor is connected between these pins. C21 c 2 C 14 adck i a/d conversion clock input. d/a 24 v out o analog signal output. 2 to 7 d d1 to d d6 i digital signal input. (d d1 : msb, d d6 : lsb) 23 comp C phase compensation capacitor is connected. insert a capacitor of 1 m f or more between this pin and a.gnd. 1 dack i d/a conversion clock input. common 18, 25 v cca C power supply for analog circuit. (+5 v) 16, 27 v ccd C power supply for digital circuit. (+5 v) 17, 26 a.gnd C ground for analog circuit. (0 v) 15, 28 d.gnd C ground for digital circuit. (0 v) other 19 C (n.c.) C no connection.
6 MB40166/mb40176 n recommended operating conditions n electrical characteristics note : *v cca =v ccd =5.0v parameter symbol value unit remarks min typ max power supply voltage v cca , v ccd 4.75 5.00 5.25 v analog input voltage v ina v ref Cv cca v MB40166 v in 0 C 1 v mb40176 digital high-level input voltage v ihd 2.0 C v digital low-level input voltage v ild CC0.8v clock frequency f clk CC20mhz clock pulse width at high level t w + 20 C C ns clock pulse width at low level t w - 20 C C ns set-up time t s 12.5 C C ns hold time t h 7.5 C C ns phase compensation capacitance c comp 1.0 C C m f clamp capacitance c clamp 1.0 C C m f reference voltage capacitance c vref 1.0 C C m f operating temperature ta 0 C 70 c analog circuit dc characteristics (v cca =v ccd =5v 5%, ta=0 to 70 c) parameter symbol condition value unit remarks min typ max resolution C C C 6 bits linearity error le dc C C 0.8 % analog high level input current i iha v ina = v cca C8.525 m a MB40166 analog low level input current i ila v ina = v ref C7.523 m a MB40166 equivalent resistance for analog input r ina v cca - v ref i iha - i ila 400 C C k w MB40166 analog input current i in -400 C C m a mb40176 reference voltage v ref *3.94.04.1v clamp voltage v clmp Cv ref Cv full-scale output voltage v ofs Cv cca Cv zero-scale output voltage v ozs Cv ref Cv output resistance r o C240C w power supply current i cc C 60* 90 ma
7 MB40166/mb40176 n electrical characteristics (continued) digital circuit dc characteristics (v cca =v ccd =5v 5%, ta=0 c to 70 c) parameter symbol condition value unit min typ max digital high-level output voltage v ohd i oh =-400 m a2.7 C C v digital low-level output voltage v old i ol =1.6ma C C 0.4 v digital high-level input voltage v ihd 2.0 C C v digital low-level input voltage v ild CC0.8v digital high-level input current i ihd CC20 m a digital low-level input current i ild -100 C C m a switching characteristics (v cca =v ccd =5v 5%, ta=0 c to 70 c) parameter symbol condition value unit min typ max maximum conversion rate f s 20 C C msps digital output delay time t pdd 81530ns analog output delay time t pda C13C ns analog output rise time t r C15C ns analog output fall time t f C15C ns
8 MB40166/mb40176 n timing chart 1. timing chart for a/d conversion 2. timing chart for d/a conversion sample n sample n+1 sample n+2 t w + t w - v ohd v old 3 v 0 v 1.5 v t pdd 1.5 v data n-1 data n data n+1 a/d conversion clock input (adck) analog signal input (v in ) digital signal output (d a1 to d a6 ) d/a conversion clock input (dack) analog signal output (v out ) digital signal input (d d1 to d d6 ) t s t h t w + t w - t r t f 10% 50% 90% 90% 50% 10% t plha t phla 3 v 0 v 1.5 v 3 v 0 v 1.5 v v ofs v ozs
9 MB40166/mb40176 n a/d conversion characteristics n d/a conversion characteristics 63 111111 62 111110 61 111101 33 100001 32 100000 31 011111 02 000010 01 000001 00 000000 4.000 v v ina , v in 4.992 v actual conversion characteristics 63 111111 62 111110 61 111101 33 100001 32 100000 31 011111 02 000010 01 000001 00 000000 v ft len max = linearity error le61 le33 le32 le31 le2 le1 step, output code step, output code ideal conversion characteristics (1lsb=16 mv) fs v ina , v in v zt ideal conversion characteristics (1lsb=16 mv) 5.000 v 4.984 v actual conversion characteristics lsb msb 0 000000 1 000001 2 000010 33 100001 32 100000 31 011111 63 111111 62 111110 input code step a.out a.out 4.520 v 4.504 v 4.488 v 4.024 v 4.008 v 3.992 v le62 le33 le32 le31 le2 le1 v ofs v ozs 0 000000 1 000001 2 000010 33 100001 32 100000 31 011111 63 111111 62 111110 input code step
10 MB40166/mb40176 n functional descriptions clamp circuit the clamp circuit contained in MB40166/mb40176 is a peak detector type, in which the top of the sync of the composite sync signal is clamped. clamp voltage is common to the reference voltage (0.8 x v cc ) of a/d and d/a circuits. MB40166 (1) providing a clamp circuit (2) directly feeding the signal at the v ina pin clamp v clmp a/d v ina (d a6 to d a1 )(d d1 to d d6 ) d/a v out - + a 1 v v cca v ref v cca v ref given voltage input level at a input level at v ina pin output level of v out 20 21 7 8 2 13 24 a/d d/a v out v cca v ref v cca v ref input level at v ina pin output level of v out 21 7 8 2 13 24 v ina (d a6 to d a1 )(d d1 to d d6 )
11 MB40166/mb40176 mb40176 a/d v in (d a6 to d a1 )(d d1 to d d6 ) d/a v out - + 1 v v cca v ref v cca v ref input level of c 2 input level at v in pin output level of v out 20 7 8 2 13 24 19 21 c 1 c 2 clamp a. gnd
12 MB40166/mb40176 n analog input equivalent circuit MB40166 mb40176 v cca a.gnd v ina equivalent circuit of clamp circuit block v clmp 100 w adc analog input equivalent circuit 20 21 400 k w 0.8 x v cc + v be x 63 circuits ~ ~ ~ 20 21 v cca a.gnd 19 equivalent circuit of clamp circuit block adc analog input equivalent circuit - + c 1 c 2 v in 400 k w 0.8 x v cc + v be 4 k w 100 w x 63 circuits ~ ~ ~ ~
13 MB40166/mb40176 n digital input equivalent circuits MB40166/mb40176 v ccd d.gnd 50 k w 3.2 k w 50 k w 1.6 k w 1.6 k w adck v t 1.4 v ~ digital input equivalent circuit of a/d converter block v ccd d.gnd 50 k w 50 k w digital input equivalent circuit of d/a converter block d a1 to d a6 dack v t 1.4 v ~
14 MB40166/mb40176 n typical connection example MB40166 note : if the clamp circuit is used, connect v ina with v clmp. if the clamp circuit is not used, do not connect v ina with v clmp . v cc 6 6 v cca v ccd v clmp v ina v out d a adck dack d d controller mb87045 memory mb81464 MB40166 comp d.gnd a.gnd 20 21 19 24 22 23 18 27 25 16 17 28 26 15 14 1 13 8 7 2 v clmp v ina n.c. v out v ref comp MB40166 v cca v ccd v ccd v cca d.gnd a.gnd d.gnd a.gnd (msb) (lsb) (lsb) (msb) adck d a1 d a6 d d6 d d1 dack 10 m h 10 m h 3.3 m f 1 m f 1 m f 3.3 m f 0.33 m f + - adc clock adc digital outputs (to controller) dac digital inputs (from controller) dac clock + - + - + - clamp voltage output video signal adc input video signal dac output 0.33 m f
15 MB40166/mb40176 n typical connection example (continued) (1) internal clamp circuit is used. (2)internal clamp circuit is not used . *: input voltage range for the analog input pin is v ref up to v cca . v ccd 20 21 2.2 k w 2sa933 v cca d.gnd a.gnd analog input pin +9 v +5 v +5 v v clmp v ina MB40166 1 m f - + external component v ccd 20 21 v cca d.gnd a.gnd analog input pin * +5 v +5 v v clmp v ina MB40166 open
16 MB40166/mb40176 n typical connection example (continued) mb40176 0.33 m f 0.33 m f v cc 6 6 v cca v ccd v in c 1 d a adck dack d d controller mb87045 memory mb81464 mb40176 comp d.gnd a.gnd 19 20 21 24 22 23 18 27 25 16 17 28 26 15 14 1 13 8 7 2 v in c 1 c 2 v out v ref comp mb40176 v cca v ccd v ccd v cca d.gnd a.gnd d.gnd a.gnd (msb) (lsb) (lsb) (msb) adck d a1 d a6 d d6 d d1 dack 10 m f 10 m f 3.3 m f 1 m f 1 m f 3.3 m f + - adc clock adc digital outputs (to controller) dac digital inputs (from controller) dac clock + - + - + - video signal adc input video signal dac output c 2 v out 1 m f - +
17 MB40166/mb40176 n typical connection example (continued) 1.on-chip input pnp transistor is utilized. note : input impedance of v in input pin (19) is about 20 k w , please pay attention to output impedance of signal source. 2. input pnp transistor of clamp circuit is put externally. note : both v in (19) and c (20) are connected with v cca . v ccd 20 v cca d.gnd a.gnd video signal input +5 v +5 v 1 m f - + 19 v in c 1 c 2 21 mb40176 v ccd 21 2.2 k w 2sa933 v cca d.gnd a.gnd video signal input +9 v +5 v +5 v c 2 1 m f external circuit - +
18 MB40166/mb40176 dimensions in inches (millimeters) 28-lead plastic flat package (case no.: fpt-28p-m01) ? 1994 fujitsu limited f28005s-5c .004(0.10) ? .005(0.13) m .402 .016 (10.20 0.40) .299 .012 (7.60 0.30) .050(1.27) typ a .018 .004 (0.45 0.10) .110(2.80) max (mounting height) .002(0.05) min (stand off height) .362 .012 (9.20 0.30) .020 .008 (0.50 0.20) +.002 -.001 +0.05 -0.02 .006 (0.15 ) details of a part .008(0.20) .024(0.60) .007(0.18) max .027(0.68) max .699 index .650(16.51) ref (17.75 ) +.010 -.008 +0.25 -0.20
19 MB40166/mb40176 dimensions in inches (millimeters) 28-lead plastic dual in-line package (case no.: dip-28p-m03) ? 1994 fujitsu limited d28012s-3c 1.024 +.008 -.012 (26.00 ) +0.20 -0.30 .358 .010 (9.10 0.25) index-1 .020(0.51)min .191(4.85)max .118(3.00)min .400(10.16) typ 15 max .039 +.020 -0 (1.00 ) +0.50 -0 index-2 .070(1.778)max .010 .002 (0.25 0.05) .018 .004 (0.45 0.10) .910(23.114)ref .070 .007 (1.778 0.18)
20 MB40166/mb40176 fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 1015, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211, japan tel: (044) 754-3753 fax: (044) 754-3329 north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 432-9044/9045 europe fujitsu mikroelektronik gmbh am siebenstein 6-10 63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 asia pacific fujitsu microelectronics asia pte. limited no. 51 bras basah road, plaza by the park, #06-04 to #06-07 singapore 189554 tel: 336-1600 fax: 336-1609 f9601 ? fujitsu limited printed in japan all rights reserved. circuit diagrams utilizing fujitsu products are included as a means of illustrating typical semiconductor applications. com- plete information sufficient for construction purposes is not nec- essarily given. the information contained in this document has been carefully checked and is believed to be reliable. however, fujitsu as- sumes no responsibility for inaccuracies. the information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by fujitsu. fujitsu reserves the right to change products or specifications without notice. no part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of fujitsu. the information contained in this document are not intended for use with equipments which require extremely high reliability such as aerospace equipments, undersea repeaters, nuclear con- trol systems or medical equipments for life support.

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